The present disclosure relates generally to a system and method of reducing repeater power, particularly within a crosstalk noise environment.
Due to continued silicon technology evolution in shrinking feature size and increased chip size, the number of transistors on microprocessors continues to increase. Digital microprocessor operation translates into switching on and/or off transistors at frequencies reaching several GHz. At any time, even if the switching occurs on just a fraction of the billions of transistors, increasing amounts of power are consumed. This power increase has adverse effects in chip operation, reliability and manufacturing cost due to the need of complex cooling systems. As such there is a very concerted effort to reduce power in modern GHz microprocessor and integrated circuits to keep such designs within pre-defined system power targets.
However, reducing the power of components of the integrated circuits may affect crosstalk characteristics of the integrated circuit by changing the timing of signals in the integrated circuit.